HEPIC Traineeship Program

About HEPIC Traineeship Program

The HEPIC Traineeship Program provides graduate students interested in integrated circuit design with an opportunity to learn about the types of experiments conducted at Department of Energy (DoE) national laboratories around the country, which work on high energy physics (HEP) including various particle accelerators. It introduces the trainees to the HEP design community, the scientific ASIC design challenges they face, and other students across the country who are part of the same program. Visit the HEPIC Traineeship Program application website for more details about the eligibility and support for the trainees.

HEPIC Trainees

2022

Priyanka Dilip (Stanford)
HEPIC Training: Fermi National Accelerator Lab

I am a graduate student at Stanford University pursuing my MS in Electrical Engineering. I hold a B.S. in Electrical and Computer Engineering from Cornell University, Class of 2021. I am passionate about developing solutions at the intersection of semiconductors and large-scale applications. My past research experiences at both national and university laboratories were in sensing/readout chip design, ML/DL accelerators, FPGA reconfigurability, autonomous flight, nanofabrication, and plasma nanosynthesis. I have also interned in several industries: semiconductors (Intel), accelerated computing (Cornell CAC), and defense (Lockheed Martin-Sikorsky RMS). 

My HEPIC Traineeship work is under Fermi National Accelerator Laboratory’s ASIC group in the Detector R&D division. In the upcoming fall 2023, I will be pursuing doctoral studies building photonic integrated circuits at the Lightwave Research Laboratory, Columbia University.

Akyl Swaby (UC Santa Cruz)
HEPIC Training: Brookhaven National Lab

I am currently a 2nd-year PhD student at the University of California, Santa Cruz in the Electrical and Computer Engineering Department (ECE). My thesis work involves characterization of electronic materials and devices, medical and molecular imaging technologies, and instrumentation for radiation detection applications. My research interests include front-end readout electronics, integrated circuit design, pixel readouts, and photon counting X-ray imagers.



Victor Turbiner (Stanford)
HEPIC Training: SLAC National Accelerator Lab

I am a first year PhD student in Stanford’s Electrical Engineering department, and I am interested in designing hardware systems. When I was an undergraduate student, my goal was to understand how each component of a computer worked. I studied how semiconductor devices worked, how they were manufactured, how they can be used to create analog and digital circuits, and finally how the whole system comes together to make a computer. As a graduate student, I now hope to use this knowledge to design new and interesting systems. I am currently interested in analog and optical fiber communication systems.

2023

Maximus Di Perna (Stanford)
HEPIC Training: SLAC National Accelerator Lab

My research interest is to use tools in solid state physics and IC design to save lives and/or discover something about the universe. I am a Stanford student majoring in Engineering Physics (‘23), doing a coterm in EE (‘24), and an incoming PhD student in EE. In the HEPIC traineeship program, I will improve my knowledge in solid state physics, IC design, and gain teamwork experience, which will be a fantastic preparation for my PhD studies. 


Mariana Huerta (UC Santa Cruz)
HEPIC Training: Lawrence Berkeley National Lab

Lilian Molina (UC Davis)
HEPIC Training: Fermi National Accelerator Lab

I am currently pursuing a master's degree in the Electrical and Computer Engineering Department at UC Davis, where I completed my Bachelors of Science in 2022. My research is primarily centered on mixed-signal integrated circuit (IC) design, with a particular emphasis in applications for radiation detectors. When I am not on campus, I enjoy spending time with my friends and family.



Jacob Sillman (UC Davis)
HEPIC Training: SLAC National Accelerator Lab

I am a first-year electrical engineering master's student at UC Davis, part of an accelerated master's program. My research area is in analog IC design, particularly PMIC and power-ICs. My current research project is proofing and designing an analog processor to compute the SoftMax activation function to accelerate convolutional neural network computation. My goal is to broaden my understanding of IC design into ASIC design, as well as get hands-on experience with IC CAD tools from theory to tape-out.


Man Yu (UC Davis)
HEPIC Training: Lawrence Berkeley National Lab

My passion in the research of electrical engineering is in both low-power analog as well as terahertz and millimeter wave IC designs. I took courses in power electronics, RFIC, and digital IC. On Cadence Virtuoso, I designed a large bandwidth 10dB amplifier at 200 GHz using a 45 nm process NMOS and an oscillator for that frequency. I also fabricated impedance transformers of a 3-stage cascaded microstrip lines in a dark room. I aim to return to academia as my career and focus on research in terahertz-speed ADC and DACs, as well as other RFIC and analog IC related fields.